Die Shots image exposure of Intel Core Ultra "Meteor Lake" CPU

The Intel Core Ultra "Meteor Lake" CPU is based on the Disaggregated Architecture architecture and uniformly encapsulates various IPs in the form of chiplets.

According to the exposed Die Shot images, the Meteor Lake processor has a total of 4 chips, including computing (CPU), graphics (GPU), SOC (NPU, etc.), and I/O tiles.

All 4 tiles are packaged using both internal and external packaging processes, which means that some tiles are packaged by Intel, while the rest are packaged by third-party wafer fabs such as TSMC.

The main CPU tile is packaged using Intel 4 (7nm) EUV technology, while the SOC tile and IOE tile are packaged using TSMC's N6 (6nm) technology.

Another major component of the Meteor Lake CPU is iGPU (Tiled GPU), newly named iGPU (Tiled GPU), which is a 5nm process node of TSMC.

The four tiles of the Meteor Lake CPU are as follows:

Intel Meteor Lake Compute Tile: Intel 4 (7nm) EUV

Intel Meteor Lake Graphics Tile: TSMC 5nm

Intel Meteor Lake SOC Tile: TSMC 6nm

Intel Meteor Lake IO Tile: TSMC 6nm

The Die Shot image shows 2+8+2 SKUs, including:

Two Redwood Cove based P-cores

8 Crestmont based E-cores

Two low-power E-cores based on the same Crestmont

The first 2 P cores and 8 E cores are located in the computing (CPU) Tiles, where you can see the top 2 large P cores, followed by the bottom 8 smaller E cores.

The large block in the middle is the cache. In this configuration, there is a total of 12 MB of smart cache. Redwood Cove P-Cores has 2 MB of L2 per core, while Crestmont E-Cores has 4 MB of L2 cache per cluster.

On the GPU Tile, four Xe Core versions based on the Arc Akchemist architecture can be seen, with the most crowded parts appearing to be SOC and I/O modules, which have various components such as controllers (memory/storage/PCIe), NPUs, dedicated low-power video islands, and so on.

SOC Tile has two Crestmont LP E cores.